(C12-3) The Safety-Capable CPU: The Foundation for Physical AI in Embedded Systems

Physical AI is driving a new generation of autonomous machines, industrial robots, software-defined vehicles, and intelligent edge infrastructure. These systems must integrate AI inference, real-time control, connectivity, and functional safety while meeting demanding power, performance, and reliability requirements. As architectures evolve toward heterogeneous and chiplet-based designs, the CPU serves as the orchestration layer that coordinates applications, accelerators, communications, and safety-critical functions. This session explores how safety-capable CPU platforms enable scalable, deterministic deployment of intelligent systems through open, standards-based ecosystems, providing the foundation for next-generation embedded computing and physical AI innovation.