Embedded AI: Bridging the gap from high-level neural network design to low-level embedded execution

In the embedded space, neural network design takes place at a high level of abstraction in rich software environments on large clusters of processors.  However, designers typically have limited knowledge of the low-level target embedded hardware details, making accuracy and performance tradeoffs unclear. Generally, this limitation has been addressed by keeping network designs simple with structures that are built from a small number of operators and accepting a relatively low level of performance. However, today the success of neural network based artificial intelligence demands greater flexibility and optimization of performance and accuracy in network design. This presentation will discuss the challenges and solutions to mapping high-level neural networks to low-level embedded hardware.